bus arbiter

The basic principle of PCI bus arbitration and the characteristic of CPLD/ FPGA are described. The design of PCI arbiter based on circular priority algorithm is realized with Verilog HDL. The simulation result is given.

介绍了PCI仲裁的原理，在此基础上描述了基于CPLD/FPGA的一种具有循环优先级通用的PCI仲裁器设计方案，并采用Verilog硬件描述语言设计实现，给出了仿真结果。

And the architecture of multiprocessors based on shared bus is an advisable architecture. The article has studied the bus arbitration mechanism of multiprocessor system architecture based on the characteristics of modern instrument. We selected the distributed arbiter and dynamic priority scheme to implement the target bus arbiter.

在分析现代仪器系统特点的基础上，研究了多微处理器系统的总线仲裁机制，选择了基于分布式仲裁方式和动态优先权策略作为系统的总线仲裁机制。

The basic principle of PCI bus arbitration is described and a PCI arbiter is designed in the paper.

论述了PCI仲裁的基本原理，给出了一个PCI仲裁器设计。